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Hardware Verification with AI ML |
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Machine Learning for Hardware Design, Verification & Manufacturing.docx |
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Call for Cooperation or Support |
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*** Artificial Neural Network for Stimulus Generation Optimization in Hardware Functional Verification *** |
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I would like to talk with you about a research and development opportunity with you on the above subject. I would like to find someone or some organization to fund my above researches in form of either a research position as a visiting scholar or as sponsor, or as a direct investment into my research projects or other forms of supports. ############### My research is about the application of Artificial Intelligence and Machine Learning to hardware verification with my current focus on Artificial Neural Networks. At the moment I am going to write and publish some works in the following direction: *** Artificial Neural Network for Stimulus Generation Optimization in Hardware Functional Verification ***. This is one of the key areas of concerns for the verification engineers. I am just planning to have some deep investigations into the topic. I plan to make a thorough study of this subject this year, and then continue with the captioned subject in the next years. ############### In addition to paper writing, I am also planning to develop some tools, codes, apps for use together with verification tools and environments, either as standalone, plugins or modules for EDA tools. ####################### I have been involving in AI well since 2013, when I was studying the graph-theoretical aspects of IC (integrated circuits) design, where AI is also key to developing EDA algorithms for VLSI design. A couple of years ago my IC verification activities have also been involving lots of AI/ML techniques and algorithms, as well as my quantum circuits design for example qubit routing which employs deep reinforcement learning to improve the routing efficiency. My current design focuses on hardware verification, particularly verification with UVM, OSVVM, UVVM, cocotb, ABV (SVA, PSL). A bit earlier,I have been concentrated on design and verification of ICs and IP cores for wireless communications (modulation and demodulation) during 2018-2022, particularly for satellite broadband Internet, those Elon Mask is deadly promoting right now. Authoring As far as authoring is concerned, I have been authoring a huge volume of books containing all aspects of the verification processes - from methodologies to languages, from platforms to testing systems. My first book in this direction was related to verification languages with Python, and afterwards SystemC, VHDL, (System)Verilog and a bunch of other verification languages.;then come the verification methodologies - UVM, UVVM, OSVVM, OVM etc. I used also to write the gigantic book series titled “Silicon IP – Not just Design”. Other books I have drafted include the following: Protecting Your IP Cores Earlier researches & writing Considering my earlier researches, apart from my researches many years ago, which you may find in my CV or my personal site, I can cite the one that is the mathematics for development and design of quantum computer (particularly Artificial Intelligence (Machine Learning and others) & heuristics). I started from qubit routing with a comprehensive review of that area together with an indepth study of a specific topic, one no one has tried sofar. I have initiated the writing of the following articles but stopped 2 or 3 years ago: 1) Math (AI & Heuristics) for Qubit Routing – A Survey This research and writing was just the start of my huge research and writing plan in the quantum area. In fact, I have done a number of researches on quantum computer before, notably on graph theoretical applications for quantum circuits design, in line with the D-Wave quantum computer developed by a Canadian company a couple of years ago. I don't know what is its status now, because since 2016 my quantum research is stopped. |
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